June 2026 – R3TR0

WonderMCA: Gone before we looked, the Model 57’s early /CD-SETUP and the POS register that never answered

vincent / June 26, 2026 / IBM PS/2

The card that vanished from setup

WonderMCA had been enumerating cleanly across the PS/2 matrix for weeks. POST passed, the option ROM checksummed, the adapter ID showed up in the reference-diskette setup. Then I sat down at the IBM PS/2 Model 57 — the 8557, a 386SX desktop — booted it, and the card was simply not there. No adapter, no slot, nothing. POST didn’t even complain; from the chassis’s point of view there was no WonderMCA in the bus at all.

That’s a particular kind of frustrating. A crash gives you a code. A disappearance gives you nothing. The card was clearly alive — the screenpad lit up, Core 0 was running, the UART banner printed — but the one thing it had to do during the first second of POST, answer the POS scan, it wasn’t doing.

What the card is supposed to do

A quick … Read the rest

Uncategorized

DMA / Single player always wins…

vincent / June 26, 2026 / Uncategorized

A bet you can’t lose — and somehow did

Micro Channel arbitration is a tournament. Any device that wants the bus — a DMA controller, a bus-master card, the refresh logic — drops its 4‑bit arbitration level onto the shared ARB[3:0] lines during the arbitration window, and the lowest level wins. The lines are open‑collector and active‑low: you pull down the bits that are 0 in your level, you release the bits that are 1, and the wired‑AND of everyone’s drive settles to the winner. Lose a bit to someone with higher priority, and you drop out of all the lower bits too.

Here’s the thing about a tournament with one entrant: the single player always wins. When WonderMCA is the only card asking for the bus, its arbitration is a formality — present level 0001 (DMA channel 1), nobody contests it, the planar grants it the bus, … Read the rest

IBM PS/2

WonderMCA — the new board revision is heading to JLCPCB

vincent / June 13, 2026 / IBM PS/2

The next WonderMCA board is on its way — the new revision is currently being manufactured by JLCPCB. This is the biggest step the project has taken so far: it sets out to fix every issue from the initial release while adding a whole stack of new capabilities that push the card much closer to its final form.

What’s new

RP2350 design is now using 0603 footprint
A bigger brain for the bus — new CPLD. The card moves to the ATF1508-10 in a PLCC84 package, giving plenty more room for the Micro Channel glue logic.
In-circuit CPLD programming. A TAG-Connect footprint lets the CPLD be reprogrammed in place — no more fiddling with the chip to push a new logic build.
A full 16-bit data path. A new mux plus an additional bidirectional buffer let the card properly handle the 16-bit MCA data bus.
More signals on the

… Read the rest

Uncategorized

WonderMCA part 4 – From silence to TADA – making Sound Blaster DMA work on an MCA PS/2

vincent / June 13, 2026 / Uncategorized

Why this was hard

When I started WonderMCA — a PicoMEM-style RP2350-based card for the IBM PS/2 MCA bus — the obvious “killer app” was Sound Blaster emulation. FreddyV has worked hard to bring the PicoMEM a working SBDSP emulator for ISA Bus; on MCA we get the same software base.

Except for one little detail: the DMA.

The whole point of a Sound Blaster emulation is that it streams 8-bit PCM sample data from RAM to the DAC without the CPU babysitting every sample. That stream goes through DMA (Direct Memory Acces). On an ISA Sound Blaster the DMA is pretty simple — there’s a single 8237 DMA controller on the chassis, you wire the card’s DREQ/DACK pins to one of its channels, and the controller’s hardware does the rest. Total mental load: 30 seconds.

MCA is not ISA. MCA has no 8237. MCA has CACP.

MCA

… Read the rest

IBM PS/2

WonderMCA part 3 – Hunting a Ghost & How MADE24 broke /CMD on 386 PS/2 chassis

vincent / June 8, 2026 / IBM PS/2

A driver that “shouldn’t” work

For most of WonderMCA’s development the chassis matrix looked encouraging. The card came up clean on the IBM PS/2 Model 8550Z, on the 8555, on the 8556, on the 8557. POST passed, the option ROM checksum was correct, the screenpad lit up, the floppy emulator mounted images, the NE2000 tunnelled traffic over W5500. By early May 2026 four 286-class & 386 PS/2 boxes were green across the matrix.

Then I plugged the same card into a Model 8570 — the 25 MHz 386DX desktop — and got:

D0000  114

POST 114. The chassis BIOS had scanned for option ROMs in the C000–DFFF region, found WonderMCA’s 0x55 0xAA signature at segment D000, summed the declared 16 KB, and the modulo-256 result wasn’t zero. From the chassis’s point of view the option ROM was corrupt.

But it wasn’t corrupt. The 16 KB ROM image is built by … Read the rest